Chip carriers typically use circuit carrying substrates in their manufacture. The typical substrate comprises copper plating applied to a polymeric dielectric layer, wherein the copper plating is patterned to form electrical conductors. Depending on the application, the substrate may have a portion requiring electrical interconnections of one form, such as by wire bonding, and another portion requiring electrical interconnections of another form, such as by soldering.
The chip carrier typically uses a substrate having opposing surfaces, with an electronic component, such as a semiconductor device, wire bonded to one of its surfaces. To support the wire bonding of the semiconductor device, many prior art implementations employ gold metallization over nickel and copper to form a wire bondable area on the substrate. Usually, gold is also disposed on other areas of the substrate to protect the copper plating from oxidation, and for simplicity in manufacturing. Additionally, some modern chip carrier packages use an array of solder balls on the mounting surface for providing electrical and mechanical support for the chip carrier. The solder balls are typically mounted directly on the gold metallized substrate. However, solder connections so made have resulted in solder joint failures in some applications.
Therefore, there exists to address the problem of unreliable solder connections, particularly on chip carriers using an array of solder balls as an electrical interconnection scheme.